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178 Open 810 Closed
178 Open 810 Closed
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Issues list

[BUG] Bug Report: Spike Version Mismatch notCV32A65X It is not an CV32A65X issue Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2366 opened Jul 12, 2024 by sudorair
1 task done
@zchamski
2
Spyglass Warnings increased by new PMP entries Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2365 opened Jul 12, 2024 by Asmaa-Kassimi
1 task done
@moimfeld
[BUG] Spike Tandem mismatches on smoke tests Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2356 opened Jul 11, 2024 by valentinThomazic
1 task done
Non-Compiler based test environment
#2352 opened Jul 11, 2024 by Tanishqgithub
1
[BUG] Incorrect depth of Instr_queue in the specification Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2350 opened Jul 10, 2024 by AEzzejjari
1 task done
@JeanRochCoulon @ASintzoff
[BUG] Instructions that access a non-existent CSR are reserved Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2347 opened Jul 10, 2024 by xiaoweish
1 task done
HPDCache is not compatible with WtDcacheWbufDepth > 2 Component:RTL For issues in the RTL (e.g. for files in the rtl directory) Component:Verif For issues in the verification environment or test cases (e.g. for testbench, C code, etc.) CV32A65X Part: Embedded configuration
#2345 opened Jul 10, 2024 by cathales
@cfuguet
4
Unable to synthesize using Yosys notCV32A65X It is not an CV32A65X issue Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2319 opened Jul 4, 2024 by Harshitha276
1 task done
10
[TASK] Upgrade Spike tandem with DPI functions to access CSRs and to update with Interrupt/Debug signals
#2317 opened Jul 3, 2024 by AnouarZajni
1 task done
Genesys 2 UART port disables on connect notCV32A65X It is not an CV32A65X issue
#2308 opened Jul 2, 2024 by benlarsendk
[BUG] Linking error: undefined reference to htif_t::load_payload notCV32A65X It is not an CV32A65X issue Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2298 opened Jun 27, 2024 by shreyas-kalikar
1 task done
3
[BUG] minstret and mcycle do not increment in debug mode, while dcsr.stopcount is set to 0 (normal mode) notCV32A65X It is not an CV32A65X issue Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2297 opened Jun 27, 2024 by xiaoweish
1 task done
5
Error while running riscv-arch-test notCV32A65X It is not an CV32A65X issue
#2290 opened Jun 24, 2024 by abhikutari
1
[BUG] stall_instr_fetch signal in core/id_stage.sv will not be driven if CVA6Cfg.RVZCMP is disabled notCV32A65X It is not an CV32A65X issue Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2289 opened Jun 23, 2024 by ckf104
1 task done
[BUG] B extension: incorrect decoding for some instructions in RV32 Component:RTL For issues in the RTL (e.g. for files in the rtl directory) CV32A65X Part: Embedded configuration Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2280 opened Jun 20, 2024 by ASintzoff
1 task done
@JeanRochCoulon
2
[TASK] Implement CVXIF 1.0.0 instruction dedicated to verification Component:SpikeTandem Issue that impacts Spike Tandem operation Component:Verif For issues in the verification environment or test cases (e.g. for testbench, C code, etc.) Type:Task Project related task
#2277 opened Jun 20, 2024 by Gchauvon
1 task done
@MarioOpenHWGroup
Fix the 65x CSR document Component:Doc For issues in the Documentation (e.g. for README.md files) PARAM:CSR CSR Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2275 opened Jun 20, 2024 by JeanRochCoulon
@zchamski
2
[BUG] "Virtual" test list fails when icache settings are modified Component:RTL For issues in the RTL (e.g. for files in the rtl directory) notCV32A65X It is not an CV32A65X issue Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2252 opened Jun 13, 2024 by LQUA
1 task done
latch detection in spyglass audit report Component:RTL For issues in the RTL (e.g. for files in the rtl directory) Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2247 opened Jun 12, 2024 by Asmaa-Kassimi
1 task done
@JeanRochCoulon @ASintzoff
1
[BUG] SPIKE model is not configurable with TvalEn core option Component:SpikeTandem Issue that impacts Spike Tandem operation Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2243 opened Jun 12, 2024 by LQUA
1 task done
@zchamski
1
GCC 13.1.0 Prerequisites to run benchmark.sh Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2230 opened Jun 11, 2024 by Tanishqgithub
1 task done
12
Reduce gate count of csr_regfile.sv Component:RTL For issues in the RTL (e.g. for files in the rtl directory) Type:Enhancement For feature requests and enhancements
#2219 opened Jun 10, 2024 by JeanRochCoulon
TIME/TIMEH not implemented Component:RTL For issues in the RTL (e.g. for files in the rtl directory) notCV32A65X It is not an CV32A65X issue Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2218 opened Jun 10, 2024 by JeanRochCoulon
Fix Camel style for cva6 parameters Component:RTL For issues in the RTL (e.g. for files in the rtl directory) Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2217 opened Jun 10, 2024 by JeanRochCoulon
1
[TASK] [FPGA] Support for Xilinx AXI 1G/2.5 G Ethernet Subsystem notCV32A65X It is not an CV32A65X issue
#2213 opened Jun 7, 2024 by WorldofJARcraft
1 task done
@jquevremont
8
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